[GIT PULL] Microchip RISC-V devicetree fixes for 6.0-rc3
Palmer Dabbelt
palmer at dabbelt.com
Thu Aug 25 16:33:51 PDT 2022
On Thu, 25 Aug 2022 11:17:45 PDT (-0700), Conor.Dooley at microchip.com wrote:
> Hey Palmer,
>
> Couple fixes here for -rc3.. Notably the patch from Heinrich as it
> stops the console being /flooded/ by error messages from the l2
> cache controller's interrupt handler.
>
> Unfortunately, that fix brought with it another dtbs_check warning
> for which I have submitted patches:
>
> https://lore.kernel.org/linux-riscv/20220825180417.1259360-1-mail@conchuod.ie
>
> On track for zero warnings in v6.1 though, patches are applied for
> the others in the pci tree.
>
> Thanks,
> Conor.
>
> The following changes since commit 69dac8e431af26173ca0a1ebc87054e01c585bcc:
>
> Merge tag 'riscv-for-linus-5.20-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux (2022-08-12 18:39:43 -0700)
>
> are available in the Git repository at:
>
> https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/ tags/dt-fixes-for-palmer-6.0-rc3
>
> for you to fetch changes up to e4009c5fa77b4356aa37ce002e9f9952dfd7a615:
>
> riscv: dts: microchip: mpfs: remove pci axi address translation property (2022-08-23 22:15:55 +0100)
>
> ----------------------------------------------------------------
> Microchip RISC-V devicetree fixes for 6.0-rc3
>
> Two sets of fixes this time around:
> - A fix for the interrupt ordering of the l2-cache controller. If the
> driver is enabled, it would spam the console /constantly/, rendering
> the system useless.
> - General cleanup for some bogus properties in the dt, part of my quest
> for zero dtbs_check warnings.
>
> On that note, the interrupt ordering adds a dtbs_check warning - but I
> considered that fixing the potentially useless system was more of a
> priority.
>
> Signed-off-by: Conor Dooley <conor.dooley at microchip.com>
>
> ----------------------------------------------------------------
> Conor Dooley (4):
> riscv: dts: microchip: mpfs: fix incorrect pcie child node name
> riscv: dts: microchip: mpfs: remove ti,fifo-depth property
> riscv: dts: microchip: mpfs: remove bogus card-detect-delay
> riscv: dts: microchip: mpfs: remove pci axi address translation property
>
> Heinrich Schuchardt (1):
> riscv: dts: microchip: correct L2 cache interrupts
>
> arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts | 3 ---
> arch/riscv/boot/dts/microchip/mpfs-polarberry.dts | 3 ---
> arch/riscv/boot/dts/microchip/mpfs.dtsi | 5 ++---
> 3 files changed, 2 insertions(+), 9 deletions(-)
Thanks, this is on fixes.
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