[PATCH v5 1/1] gpio: mpfs: add polarfire soc gpio support

[Lewis.Hanly at microchip.com]

On Mon, 2022-08-15 at 09:38 +0200, Christophe JAILLET wrote:
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> Le 15/08/2022 à 09:06, lewis.hanly at microchip.com a écrit :
> > From: Lewis Hanly <lewis.hanly at microchip.com>
> > 
> > Add a driver to support the Polarfire SoC gpio controller
> > 
> > Signed-off-by: Lewis Hanly <lewis.hanly at microchip.com>
> > ---
> >   drivers/gpio/Kconfig     |   7 +
> >   drivers/gpio/Makefile    |   1 +
> >   drivers/gpio/gpio-mpfs.c | 318
> > +++++++++++++++++++++++++++++++++++++++
> >   3 files changed, 326 insertions(+)
> >   create mode 100644 drivers/gpio/gpio-mpfs.c
> > 
> > +static int mpfs_gpio_probe(struct platform_device *pdev)
> > +{
> > +     struct clk *clk;
> > +     struct device *dev = &pdev->dev;
> > +     struct device_node *node = pdev->dev.of_node;
> > +     struct mpfs_gpio_chip *mpfs_gpio;
> > +     struct gpio_irq_chip *girq;
> > +     int i, ret, ngpios, nirqs;
> > +
> > +     mpfs_gpio = devm_kzalloc(dev, sizeof(*mpfs_gpio),
> > GFP_KERNEL);
> > +     if (!mpfs_gpio)
> > +             return -ENOMEM;
> > +
> > +     mpfs_gpio->base = devm_platform_ioremap_resource(pdev, 0);
> > +     if (IS_ERR(mpfs_gpio->base))
> > +             return dev_err_probe(dev, PTR_ERR(mpfs_gpio->clk),
> > "input clock not found.\n");
> 
> PTR_ERR(mpfs_gpio->base)?
> "input clock not found" also looks odd after a
> devm_platform_ioremap_resource() call.
Yes, thank you, have fixed in a v6 which is on way.
> 
> > +
> > +     clk = devm_clk_get(dev, NULL);
> > +     if (IS_ERR(clk))
> > +             return dev_err_probe(dev, PTR_ERR(clk), "devm_clk_get
> > failed\n");
> > +