[PATCH 00/12] riscv: Allwinner D1 platform support
Samuel Holland
samuel at sholland.org
Sun Aug 14 22:08:03 PDT 2022
This series adds the Kconfig/defconfig plumbing and devicetrees for a
range of Allwinner D1-based boards. Many features are already enabled,
including USB, Ethernet, and WiFi.
The SoC devicetree uses bindings from the following series which have
not yet been merged:
- SRAM controller:
https://lore.kernel.org/lkml/20220815041248.53268-1-samuel@sholland.org/
- NVMEM cell bits property change:
https://lore.kernel.org/lkml/20220814173656.11856-1-samuel@sholland.org/
- In-package LDO regulators:
https://lore.kernel.org/lkml/20220815043436.20170-1-samuel@sholland.org/
All three of these are required to set the correct I/O domain voltages
in the pin controller, which I would consider important to have in the
initial version of the devicetree.
The SoC devicetree does contain one small hack to avoid a dependency on
the audio codec binding, since that is not ready yet: the codec node
uses a bare "simple-mfd", "syscon" compatible.
Samuel Holland (12):
MAINTAINERS: Match the sun20i family of Allwinner SoCs
dt-bindings: riscv: Add T-HEAD C906 and C910 compatibles
dt-bindings: vendor-prefixes: Add Allwinner D1 board vendors
dt-bindings: riscv: Add Allwinner D1 board compatibles
riscv: Add the Allwinner SoC family Kconfig option
riscv: dts: allwinner: Add the D1 SoC base devicetree
riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree
riscv: dts: allwinner: Add Sipeed Lichee RV devicetrees
riscv: dts: allwinner: Add MangoPi MQ Pro devicetree
riscv: dts: allwinner: Add Dongshan Nezha STU devicetree
riscv: dts: allwinner: Add ClockworkPi and DevTerm devicetrees
riscv: defconfig: Enable the Allwinner D1 platform and drivers
.../devicetree/bindings/riscv/cpus.yaml | 2 +
.../devicetree/bindings/riscv/sunxi.yaml | 64 ++
.../devicetree/bindings/vendor-prefixes.yaml | 4 +
MAINTAINERS | 2 +-
arch/riscv/Kconfig.socs | 9 +
arch/riscv/boot/dts/Makefile | 1 +
arch/riscv/boot/dts/allwinner/Makefile | 10 +
.../allwinner/sun20i-d1-clockworkpi-v3.14.dts | 242 +++++
.../sun20i-d1-common-regulators.dtsi | 51 +
.../dts/allwinner/sun20i-d1-devterm-v3.14.dts | 37 +
.../sun20i-d1-dongshan-nezha-stu.dts | 114 +++
.../sun20i-d1-lichee-rv-86-panel-480p.dts | 29 +
.../sun20i-d1-lichee-rv-86-panel-720p.dts | 10 +
.../sun20i-d1-lichee-rv-86-panel.dtsi | 92 ++
.../allwinner/sun20i-d1-lichee-rv-dock.dts | 74 ++
.../dts/allwinner/sun20i-d1-lichee-rv.dts | 84 ++
.../allwinner/sun20i-d1-mangopi-mq-pro.dts | 128 +++
.../boot/dts/allwinner/sun20i-d1-nezha.dts | 171 ++++
arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi | 900 ++++++++++++++++++
arch/riscv/configs/defconfig | 23 +-
20 files changed, 2045 insertions(+), 2 deletions(-)
create mode 100644 Documentation/devicetree/bindings/riscv/sunxi.yaml
create mode 100644 arch/riscv/boot/dts/allwinner/Makefile
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-clockworkpi-v3.14.dts
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-common-regulators.dtsi
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-dongshan-nezha-stu.dts
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-480p.dts
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel-720p.dts
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-86-panel.dtsi
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv-dock.dts
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-lichee-rv.dts
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-mangopi-mq-pro.dts
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1-nezha.dts
create mode 100644 arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
--
2.35.1
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