[PATCH v5] perf arch events: riscv sbi firmware std event files

Nikita Shubin nikita.shubin at maquefel.me
Thu Aug 11 01:23:03 PDT 2022


Hello Mayuresh!

On Wed, 10 Aug 2022 20:26:18 +0530
Mayuresh Chitale <mchitale at ventanamicro.com> wrote:

> On Tue, 2022-06-28 at 14:45 +0300, Nikita Shubin wrote:
> > From: Nikita Shubin <n.shubin at yadro.com>
> > 
> > Firmware events are defined by "RISC-V Supervisor Binary Interface
> > Specification", which means they should be always available as long
> > as
> > firmware supports >= 0.3.0 SBI.
> > 
> > Expose them to arch std events, so they can be reused by particular
> > PMU bindings.
> > 
> > Signed-off-by: Nikita Shubin <n.shubin at yadro.com>
> > ---
> > v4->v5:
> > - changed EventCode to ConfigCode, as 63 bit exceeds event code
> > format
> > ---
> >  .../arch/riscv/riscv-sbi-firmware.json        | 134
> > ++++++++++++++++++
> >  1 file changed, 134 insertions(+)
> >  create mode 100644 tools/perf/pmu-events/arch/riscv/riscv-sbi-
> > firmware.json
> > 
> > diff --git
> > a/tools/perf/pmu-events/arch/riscv/riscv-sbi-firmware.json
> > b/tools/perf/pmu-events/arch/riscv/riscv-sbi-firmware.json new file
> > mode 100644 index 000000000000..b9d305f1ada8
> > --- /dev/null
> > +++ b/tools/perf/pmu-events/arch/riscv/riscv-sbi-firmware.json
> > @@ -0,0 +1,134 @@
> > +[
> > +  {
> > +    "PublicDescription": "Misaligned load trap",
> > +    "ConfigCode": "0x8000000000000000",
> > +    "EventName": "FW_MISALIGNED_LOAD",
> > +    "BriefDescription": "Misaligned load trap event"
> > +  },
> > +  {
> > +    "PublicDescription": "Misaligned store trap",
> > +    "ConfigCode": "0x8000000000000001",
> > +    "EventName": "FW_MISALIGNED_STORE",
> > +    "BriefDescription": "Misaligned store trap event"
> > +  },
> > +  {
> > +    "PublicDescription": "Load access trap",
> > +    "ConfigCode": "0x8000000000000002",
> > +    "EventName": "FW_ACCESS_LOAD",
> > +    "BriefDescription": "Load access trap event"
> > +  },
> > +  {
> > +    "PublicDescription": "Store access trap",
> > +    "ConfigCode": "0x8000000000000003",
> > +    "EventName": "FW_ACCESS_STORE",
> > +    "BriefDescription": "Store access trap event"
> > +  },
> > +  {
> > +    "PublicDescription": "Illegal instruction trap",
> > +    "ConfigCode": "0x8000000000000004",
> > +    "EventName": "FW_ILLEGAL_INSN",
> > +    "BriefDescription": "Illegal instruction trap event"
> > +  },
> > +  {
> > +    "PublicDescription": "Set timer event",
> > +    "ConfigCode": "0x8000000000000005",
> > +    "EventName": "FW_SET_TIMER",
> > +    "BriefDescription": "Set timer event"
> > +  },
> > +  {
> > +    "PublicDescription": "Sent IPI to other HART event",
> > +    "ConfigCode": "0x8000000000000006",
> > +    "EventName": "FW_IPI_SENT",
> > +    "BriefDescription": "Sent IPI to other HART event"
> > +  },
> > +  {
> > +    "PublicDescription": "Received IPI from other HART event",
> > +    "ConfigCode": "0x8000000000000007",
> > +    "EventName": "FW_IPI_RECEIVED",
> > +    "BriefDescription": "Received IPI from other HART event"
> > +  },
> > +  {
> > +    "PublicDescription": "Sent FENCE.I request to other HART
> > event",
> > +    "ConfigCode": "0x8000000000000008",
> > +    "EventName": "FW_FENCE_I_SENT",
> > +    "BriefDescription": "Sent FENCE.I request to other HART event"
> > +  },
> > +  {
> > +    "PublicDescription": "Received FENCE.I request from other HART
> > event",
> > +    "ConfigCode": "0x8000000000000009",
> > +    "EventName": "FW_FENCE_I_RECEIVED",
> > +    "BriefDescription": "Received FENCE.I request from other HART
> > event"
> > +  },
> > +  {
> > +    "PublicDescription": "Sent SFENCE.VMA request to other HART
> > event",
> > +    "ConfigCode": "0x80000000000000a",
> > +    "EventName": "FW_SFENCE_VMA_SENT",
> > +    "BriefDescription": "Sent SFENCE.VMA request to other HART
> > event"
> > +  },
> > +  {
> > +    "PublicDescription": "Received SFENCE.VMA request from other
> > HART event",
> > +    "ConfigCode": "0x800000000000000b",
> > +    "EventName": "FW_SFENCE_VMA_RECEIVED",
> > +    "BriefDescription": "Received SFENCE.VMA request from other
> > HART event"
> > +  },
> > +  {
> > +    "PublicDescription": "Sent SFENCE.VMA with ASID request to
> > other HART event",
> > +    "ConfigCode": "0x800000000000000c",
> > +    "EventName": "FW_SFENCE_VMA_RECEIVED",
> > +    "BriefDescription": "Sent SFENCE.VMA with ASID request to other
> > HART event"
> > +  },
> > +  {
> > +    "PublicDescription": "Received SFENCE.VMA with ASID request
> > from other HART event",
> > +    "ConfigCode": "0x800000000000000d",
> > +    "EventName": "FW_SFENCE_VMA_ASID_RECEIVED",
> > +    "BriefDescription": "Received SFENCE.VMA with ASID request from
> > other HART event"
> > +  },
> > +  {
> > +    "PublicDescription": "Sent HFENCE.GVMA request to other HART
> > event",
> > +    "ConfigCode": "0x800000000000000e",
> > +    "EventName": "FW_HFENCE_GVMA_SENT",
> > +    "BriefDescription": "Sent HFENCE.GVMA request to other HART
> > event"
> > +  },
> > +  {
> > +    "PublicDescription": "Received HFENCE.GVMA request from other
> > HART event",
> > +    "ConfigCode": "0x800000000000000f",
> > +    "EventName": "FW_HFENCE_GVMA_RECEIVED",
> > +    "BriefDescription": "Received HFENCE.GVMA request from other
> > HART event"
> > +  },
> > +  {
> > +    "PublicDescription": "Sent HFENCE.GVMA with VMID request to
> > other HART event",
> > +    "ConfigCode": "0x8000000000000010",
> > +    "EventName": "FW_HFENCE_GVMA_VMID_SENT",
> > +    "BriefDescription": "Sent HFENCE.GVMA with VMID request to
> > other HART event"
> > +  },
> > +  {
> > +    "PublicDescription": "Received HFENCE.GVMA with VMID request
> > from other HART event",
> > +    "ConfigCode": "0x8000000000000011",
> > +    "EventName": "FW_HFENCE_GVMA_VMID_RECEIVED",
> > +    "BriefDescription": "Received HFENCE.GVMA with VMID request
> > from other HART event"
> > +  },
> > +  {
> > +    "PublicDescription": "Sent HFENCE.VVMA request to other HART
> > event",
> > +    "ConfigCode": "0x8000000000000012",
> > +    "EventName": "FW_HFENCE_VVMA_SENT",
> > +    "BriefDescription": "Sent HFENCE.VVMA request to other HART
> > event"
> > +  },
> > +  {
> > +    "PublicDescription": "Received HFENCE.VVMA request from other
> > HART event",
> > +    "ConfigCode": "0x8000000000000013",
> > +    "EventName": "FW_HFENCE_VVMA_RECEIVED",
> > +    "BriefDescription": "Received HFENCE.VVMA request from other
> > HART event"
> > +  },
> > +  {
> > +    "PublicDescription": "Sent HFENCE.VVMA with ASID request to
> > other HART event",
> > +    "ConfigCode": "0x8000000000000014",
> > +    "EventName": "FW_HFENCE_VVMA_ASID_SENT",
> > +    "BriefDescription": "Sent HFENCE.VVMA with ASID request to
> > other HART event"
> > +  },
> > +  {
> > +    "PublicDescription": "Received HFENCE.VVMA with ASID request
> > from other HART event",
> > +    "ConfigCode": "0x8000000000000015",
> > +    "EventName": "FW_HFENCE_VVMA_ASID_RECEIVED",
> > +    "BriefDescription": "Received HFENCE.VVMA with ASID request
> > from other HART event"
> > +  }
> > +]  
> 
> When testing with perf using firmware events we saw this error: 
> WARNING: event 'N/A' not valid (bits 59 of config '80000000000000a'
> not supported by kernel)!
> 
> It looks it is due to a typo and applying the below patch resolved the
> issue for us.

Thanks for catching this - indeed this is a correct fix.

> 
> Tested-by: Kautuk Consul <kconsul at ventanamicro.com>

Thank you for testing!


Yours,
Nikita Shubin.

> 
> diff --git a/tools/perf/pmu-events/arch/riscv/riscv-sbi-firmware.json
> b/tools/perf/pmu-events/arch/riscv/riscv-sbi-firmware.json
> index b9d305f1ada8..a9939823b14b 100644
> --- a/tools/perf/pmu-events/arch/riscv/riscv-sbi-firmware.json
> +++ b/tools/perf/pmu-events/arch/riscv/riscv-sbi-firmware.json
> @@ -61,7 +61,7 @@
>    },
>    {
>      "PublicDescription": "Sent SFENCE.VMA request to other HART
> event",
> -    "ConfigCode": "0x80000000000000a",
> +    "ConfigCode": "0x800000000000000a",
>      "EventName": "FW_SFENCE_VMA_SENT",
>      "BriefDescription": "Sent SFENCE.VMA request to other HART event"
>    },
> 
> 
> 




More information about the linux-riscv mailing list