[PATCH] phy: qcom: qmp-ufs: Fix SM8650 PCS table for Gear 4

[Vinod Koul]

On Thu, 19 Feb 2026 13:11:48 +0200, Abel Vesa wrote:
> According to internal documentation, on SM8650, when the PHY is configured
> in Gear 4, the QPHY_V6_PCS_UFS_PLL_CNTL register needs to have the same
> value as for Gear 5.
> 
> At the moment, there is no board that comes with a UFS 3.x device, so
> this issue doesn't show up, but with the new Eliza SoC, which uses the
> same init sequence as SM8650, on the MTP board, the link startup fails
> with the current Gear 4 PCS table.
> 
> [...]

Applied, thanks!

[1/1] phy: qcom: qmp-ufs: Fix SM8650 PCS table for Gear 4
      commit: 81af9e40e2e4e1aa95f09fb34811760be6742c58

Best regards,
-- 
~Vinod