[PATCH 23/38] arm64: dts: mediatek: mt7986a: Fix PCI-Express T-PHY node address

Matthias Brugger matthias.bgg at gmail.com
Fri Sep 12 07:12:55 PDT 2025



On 24/07/2025 10:38, AngeloGioacchino Del Regno wrote:
> The PCIe TPHY is under the soc bus, which provides MMIO, and all
> nodes under that must use the bus, otherwise those would clearly
> be out of place.
> 
> Add ranges to the PCIe tphy and assign the address to the main
> node to silence a dtbs_check warning, and fix the children to
> use the MMIO range of t-phy.
> 
> Fixes: 963c3b0c47ec ("arm64: dts: mediatek: fix t-phy unit name")
> Fixes: 918aed7abd2d ("arm64: dts: mt7986: add pcie related device nodes")
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno at collabora.com>

Applied, thanks

> ---
>   arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 12 ++++++------
>   1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> index 559990dcd1d1..3211905b6f86 100644
> --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
> @@ -428,16 +428,16 @@ pcie_intc: interrupt-controller {
>   			};
>   		};
>   
> -		pcie_phy: t-phy {
> +		pcie_phy: t-phy at 11c00000 {
>   			compatible = "mediatek,mt7986-tphy",
>   				     "mediatek,generic-tphy-v2";
> -			ranges;
> -			#address-cells = <2>;
> -			#size-cells = <2>;
> +			ranges = <0 0 0x11c00000 0x20000>;
> +			#address-cells = <1>;
> +			#size-cells = <1>;
>   			status = "disabled";
>   
> -			pcie_port: pcie-phy at 11c00000 {
> -				reg = <0 0x11c00000 0 0x20000>;
> +			pcie_port: pcie-phy at 0 {
> +				reg = <0 0x20000>;
>   				clocks = <&clk40m>;
>   				clock-names = "ref";
>   				#phy-cells = <1>;




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