[PATCH v5 02/10] dt-bindings: phy: qcom,qmp-usb: Add Glymur USB UNI PHY compatible
Wesley Cheng
wesley.cheng at oss.qualcomm.com
Thu Oct 16 17:15:48 PDT 2025
On 10/13/2025 9:36 PM, Krzysztof Kozlowski wrote:
> On 14/10/2025 03:16, Wesley Cheng wrote:
>>>>
>>>>>>> + maxItems: 5
>>>>>>> + clock-names:
>>>>>>> + items:
>>>>>>> + - const: aux
>>>>>>> + - const: clkref
>>>>>>> + - const: ref
>>>>>>
>>>>>> What is the difference between these two? Which block INPUTs
>>>>>> (important!) they represent?
>>>>>>
>>>>>
>>>>> clkref is the TCSR reference clock switch, and the ref is the actual CXO
>>>>> handle.
>>>
>>>
>>> Then this should be named somehow differently. CXO is clock. Reference
>>> clock is clock... To me it feels like you are describing the same clock,
>>> just missing some gate in TCSR. But in case these are not the same
>>> clocks, you need to name it accurately.
>>>
>>
>> Technically its all handling the same clock branch (CXO), we have the
>> TCSR clkref register that allows us to gate the CXO to the USB PHY, as
>
>
> Ah, exactly. Then clkref is not a clock. You need rather proper clock
> hierarchy.
>
>> CXO is shared across several HW blocks, so it allows us to properly
>> powerdown the PHY even though other clients are voting for CXO on. Then
>> we obviously have to remove our vote to the overall CXO, so that it can
>> potentially be shutdown.
>>
>> Maybe we can rename it to "clkref" for the CXO handle and
>> "clkref_switch" for the TCSRCC handle?
>
> Naming is better, but it is still not correct. This is not independent
> clock signal. It is the same clock.
>
Hmmm... I guess that's why I kept the same clkref tag, to denote that
its the same clock, but one is a switch/gate for it. Would you happen
to have any suggestions you might have that makes it clearer for
everyone to understand?
Thanks
Wesley Cheng
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