[PATCH v8 3/4] phy: rockchip-pcie: Enable all four lanes if required

[Geraldo Nascimento]

On Mon, Jun 30, 2025 at 11:33:19PM +0200, Heiko Stübner wrote:
> Am Montag, 30. Juni 2025, 20:22:01 Mitteleuropäische Sommerzeit schrieb Geraldo Nascimento:
> > Current code enables only Lane 0 because pwr_cnt will be incremented on
> > first call to the function. Let's reorder the enablement code to enable
> > all 4 lanes through GRF.
> > 
> > Reviewed-by: Neil Armstrong <neil.armstrong at linaro.org>
> > Reviewed-by: Robin Murphy <robin.murphy at arm.com>
> > 
> > Signed-off-by: Valmantas Paliksa <walmis at gmail.com>
> > Signed-off-by: Geraldo Nascimento <geraldogabriel at gmail.com>
> 
> hmm, if Valmantas is the original author you should probably keep that authorship
>   git commit --amend --author="Valmantas Paliksa <walmis at gmail.com>"
> should do the trick.

Hi again Heiko,

Since I don't use git-send-email and instead rely on mutt to send the
patches it seems I needed "git config format.from true" to properly
add the From: to the email body.

First try mangled From: email header, resulting in Valmantas' name
together with my email address :|

I've resent it (hopefully) corrected now.

Thanks!
Geraldo Nascimento