[PATCH v8 9/9] phy: qualcomm: qmp-combo: Add DP offsets and settings for Glymur platforms
Dmitry Baryshkov
dmitry.baryshkov at oss.qualcomm.com
Tue Dec 9 20:05:28 PST 2025
On Tue, Dec 09, 2025 at 03:09:45PM -0800, Wesley Cheng wrote:
> From: Abel Vesa <abelvesa at kernel.org>
>
> Starting with Glymur, the PCIe and DP PHYs qserdes register offsets differ
> for the same version number. So in order to be able to differentiate
> between them, add these ones with DP prefix.
>
> Add the necessary PHY setting tables for enabling the DP path within the
> QMP subsystem. Introduced some new callbacks for v8 specific sequences,
> such as for clock configurations based on the different link speeds.
>
> Wesley Cheng added some updated settings from the hardware programming
> guides on existing PHY tables and clock settings.
>
> Co-developed-by: Wesley Cheng <wesley.cheng at oss.qualcomm.com>
> Signed-off-by: Abel Vesa <abel.vesa at linaro.org>
> Signed-off-by: Wesley Cheng <wesley.cheng at oss.qualcomm.com>
> ---
> drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 355 ++++++++++++++++++++-
> drivers/phy/qualcomm/phy-qcom-qmp-dp-phy-v8.h | 25 ++
> .../phy/qualcomm/phy-qcom-qmp-dp-qserdes-com-v8.h | 52 +++
> 3 files changed, 428 insertions(+), 4 deletions(-)
>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at oss.qualcomm.com>
--
With best wishes
Dmitry
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