[PATCH 1/2] phy: qcom: qmp-pcie: Update PHY settings for SA8775P

[Dmitry Baryshkov]

On Wed, Apr 23, 2025 at 04:45:43PM +0530, Mrinmay Sarkar wrote:
> This change updates the PHY settings to align with the latest
> PCIe PHY Hardware Programming Guide for both PCIe controllers
> on the SA8775P platform.

Please read Documentation/process/submitting-patches.rst, look for
'[This patch] makes xyzzy'.

> 
> Signed-off-by: Mrinmay Sarkar <mrinmay.sarkar at oss.qualcomm.com>
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp-pcie.c           | 89 ++++++++++++----------
>  drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5_20.h |  2 +
>  drivers/phy/qualcomm/phy-qcom-qmp-pcs-v5_20.h      |  4 +
>  .../phy/qualcomm/phy-qcom-qmp-qserdes-ln-shrd-v5.h | 11 +++
>  drivers/phy/qualcomm/phy-qcom-qmp.h                |  1 +
>  5 files changed, 66 insertions(+), 41 deletions(-)
> 
> @@ -3191,6 +3194,7 @@ static const struct qmp_pcie_offsets qmp_pcie_offsets_v5_20 = {
>  	.rx		= 0x0200,
>  	.tx2		= 0x0800,
>  	.rx2		= 0x0a00,
> +	.ln_shrd	= 0x0e00,
>  };

This does more than just updating PHY sequences. ln_shrd-related changes
should go into a separate commit.

>  
>  static const struct qmp_pcie_offsets qmp_pcie_offsets_v5_30 = {

-- 
With best wishes
Dmitry