[PATCH v4 6/6] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100
Manivannan Sadhasivam
manivannan.sadhasivam at linaro.org
Wed Sep 25 01:05:22 PDT 2024
On Tue, Sep 24, 2024 at 04:26:34PM +0200, Konrad Dybcio wrote:
> On 24.09.2024 12:14 PM, Qiang Yu wrote:
> > Describe PCIe3 controller and PHY. Also add required system resources like
> > regulators, clocks, interrupts and registers configuration for PCIe3.
> >
> > Signed-off-by: Qiang Yu <quic_qianyu at quicinc.com>
> > Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> > ---
>
> Qiang, Mani
>
> I have a RTS5261 mmc chip on PCIe3 on the Surface Laptop.
Is it based on x1e80100?
> Adding the global irq breaks sdcard detection (the chip still comes
> up fine) somehow. Removing the irq makes it work again :|
>
> I've confirmed that the irq number is correct
>
Yeah, I did see some issues with MSI on SM8250 (RB5) when global interrupts are
enabled and I'm working with the hw folks to understand what is going on. But
I didn't see the same issues on newer platforms (sa8775p etc...).
Can you please confirm if the issue is due to MSI not being received from the
device? Checking the /proc/interrutps is enough.
- Mani
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