[PATCH v4 5/6] PCI: qcom: Add support for X1E80100 SoC

[Qiang Yu]

On 9/24/2024 11:17 PM, Johan Hovold wrote:
> On Tue, Sep 24, 2024 at 03:50:21PM +0200, Manivannan Sadhasivam wrote:
>> On Tue, Sep 24, 2024 at 03:14:43AM -0700, Qiang Yu wrote:
>>> X1E80100 has PCIe ports that support up to Gen4 x8 based on hardware IP
>>> version 1.38.0.
>>>
>>> Currently the ops_1_9_0 which is being used for X1E80100 has config_sid
>>> callback to config BDF to SID table. However, this callback is not
>>> required for X1E80100 because it has smmuv3 support and BDF to SID table
>>> will be not present.
>>>
>>> Hence add support for X1E80100 by introducing a new ops and cfg structures
>>> that don't require the config_sid callback. This could be reused by the
>>> future platforms based on SMMUv3.
>>>
>> Oops... I completely overlooked that you are not adding the SoC support but
>> fixing the existing one :( Sorry for suggesting a commit message that changed
>> the context.
>>
>> For this, you can have something like:
>>
>> "PCI: qcom: Fix the ops for X1E80100 SoC
>>
>> X1E80100 SoC is based on SMMUv3, hence it doesn't need the BDF2SID mapping
>> present in the existing cfg_1_9_0 ops. This is fixed by introducing new ops
>> 'ops_1_38_0' and cfg 'cfg_1_38_0' structures. These are exactly same as the
>> 1_9_0 ones, but they don't have the 'config_sid()' callback that handles the
>> BDF2SID mapping in the hardware. These new structures could also be used by the
>> future SoCs making use of SMMUv3."
> Don't we need something like this for sc8280xp and other platforms using
> SMMUv3 as well?
 From what I know, sc8280xp and other qcom platforms are not using SMMUv3.
X1E80100 and newer platforms will use SMMUv3.

Thanks,
Qiang
>
> Johan