[PATCH] dt-bindings: phy: socionext,uniphier: add top-level constraints

[Rob Herring (Arm)]

On Sun, 18 Aug 2024 19:28:35 +0200, Krzysztof Kozlowski wrote:
> Properties with variable number of items per each device are expected to
> have widest constraints in top-level "properties:" block and further
> customized (narrowed) in "if:then:".  Add missing top-level constraints
> for clock-names and reset-names.
> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
> ---
>  .../bindings/phy/socionext,uniphier-ahci-phy.yaml         | 8 ++++++--
>  .../bindings/phy/socionext,uniphier-pcie-phy.yaml         | 8 ++++++--
>  .../bindings/phy/socionext,uniphier-usb3hs-phy.yaml       | 7 +++++--
>  .../bindings/phy/socionext,uniphier-usb3ss-phy.yaml       | 7 +++++--
>  4 files changed, 22 insertions(+), 8 deletions(-)
> 

Reviewed-by: Rob Herring (Arm) <robh at kernel.org>