[PATCH v3 06/19] dt-bindings: display: imx: Add i.MX8qxp Display Controller command sequencer

[Liu Ying]

On 08/17/2024, Rob Herring wrote:
> On Wed, Jul 24, 2024 at 05:29:37PM +0800, Liu Ying wrote:
>> i.MX8qxp Display Controller contains a command sequencer is designed to
>> autonomously process command lists.
>>
>> Signed-off-by: Liu Ying <victor.liu at nxp.com>
>> ---
>> v3:
>> * New patch. (Rob)
>>
>>  .../imx/fsl,imx8qxp-dc-command-sequencer.yaml | 67 +++++++++++++++++++
>>  1 file changed, 67 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml
>> new file mode 100644
>> index 000000000000..2e0e8e40a185
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml
>> @@ -0,0 +1,67 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/display/imx/fsl,imx8qxp-dc-command-sequencer.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Freescale i.MX8qxp Display Controller Command Sequencer
>> +
>> +description: |
>> +  The Command Sequencer is designed to autonomously process command lists.
>> +  By that it can load setups into the DC configuration and synchronize to
>> +  hardware events.  This releases a system's CPU from workload, because it
>> +  does not need to wait for certain events.  Also it simplifies SW architecture,
>> +  because no interrupt handlers are required.  Setups are read via AXI bus,
>> +  while write access to configuration registers occurs directly via an internal
>> +  bus.  This saves bandwidth for the AXI interconnect and improves the system
>> +  architecture in terms of safety aspects.
>> +
>> +maintainers:
>> +  - Liu Ying <victor.liu at nxp.com>
>> +
>> +properties:
>> +  compatible:
>> +    const: fsl,imx8qxp-dc-command-sequencer
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  interrupts:
>> +    maxItems: 5
>> +
>> +  interrupt-names:
>> +    items:
>> +      - const: error
>> +      - const: sw0
>> +      - const: sw1
>> +      - const: sw2
>> +      - const: sw3
>> +
>> +  fsl,iram:
>> +    $ref: /schemas/types.yaml#/definitions/phandle
>> +    description: phandle pointing to the mmio-sram device node
> 
> 'sram' is the standard property for this.

Will use 'sram' in next version.  Thanks.

> 
>> +
>> +required:
>> +  - compatible
>> +  - reg
>> +  - clocks
>> +  - interrupts
>> +  - interrupt-names
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  - |
>> +    #include <dt-bindings/clock/imx8-lpcg.h>
>> +
>> +    command-sequencer at 56180400 {
>> +        compatible = "fsl,imx8qxp-dc-command-sequencer";
>> +        reg = <0x56180400 0x1a4>;
>> +        clocks = <&dc0_lpcg IMX_LPCG_CLK_5>;
>> +        interrupt-parent = <&dc0_intc>;
>> +        interrupts = <36>, <37>, <38>, <39>, <40>;
>> +        interrupt-names = "error", "sw0", "sw1", "sw2", "sw3";
>> +    };
>> -- 
>> 2.34.1
>>
> 

-- 
Regards,
Liu Ying