[PATCH v2] phy: qcom: qmp-pcie: Configure all tables on port B PHY

[Vinod Koul]

On 01-08-24, 18:54, Abel Vesa wrote:
> From: Qiang Yu <quic_qianyu at quicinc.com>
> 
> Currently, only the RX and TX tables are written to the second PHY
> (port B) when the 4-lanes mode is configured, but according to Qualcomm
> internal documentation, the pcs, pcs_misc, serdes and ln_shrd tables need
> to be written as well.

Sorry this does not apply on phy/next please rebase and resend

-- 
~Vinod