[PATCH 3/8] arm64: dts: qcom: ipq5332: Add USB Super-Speed PHY node

[Praveenkumar I]

On 9/29/2023 6:26 PM, Konrad Dybcio wrote:
> On 29.09.2023 10:42, Praveenkumar I wrote:
>> Add USB Super-Speed UNIPHY node and populate the phandle on
>> gcc node for the parent clock map.
>>
>> Signed-off-by: Praveenkumar I <quic_ipkumar at quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/ipq5332.dtsi | 25 ++++++++++++++++++++++++-
>>   1 file changed, 24 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq5332.dtsi b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> index d3fef2f80a81..b08ffd8c094e 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq5332.dtsi
>> @@ -158,6 +158,29 @@ usbphy0: phy at 7b000 {
>>   			status = "disabled";
>>   		};
>>   
>> +		usbphy1: phy at 4b0000 {
>> +			compatible = "qcom,ipq5332-usb-uniphy";
>> +			reg = <0x4b0000 0x800>;
> Please pad the address part to 8 hex digits with leading zeroes.
Sure, will add.
>
>> +
>> +			clocks = <&gcc GCC_PCIE3X1_PHY_AHB_CLK>,
>> +				 <&gcc GCC_USB0_PHY_CFG_AHB_CLK>,
>> +				 <&gcc GCC_USB0_PIPE_CLK>;
>> +			clock-names = "ahb",
>> +				      "cfg_ahb",
>> +				      "pipe";
>> +
>> +			resets =  <&gcc GCC_USB0_PHY_BCR>;
> Looks like there's a double space after '='
Sure, will remove the extra space.

--
Thanks,
Praveenkumar
>
> Konrad