[PATCH v2 2/4] phy: qualcomm: phy-qcom-eusb2-repeater: Use regmap_fields
Konrad Dybcio
konrad.dybcio at linaro.org
Wed Sep 13 02:53:24 PDT 2023
Switch to regmap_fields, so that the values written into registers are
sanitized by their explicit sizes and the different registers are
structured in an iterable object to make external changes to the init
sequence simpler.
Signed-off-by: Konrad Dybcio <konrad.dybcio at linaro.org>
---
drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c | 91 +++++++++++++++++---------
1 file changed, 61 insertions(+), 30 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c b/drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
index 52c275fbb2a1..7561da01e633 100644
--- a/drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
+++ b/drivers/phy/qualcomm/phy-qcom-eusb2-repeater.c
@@ -28,14 +28,42 @@
#define EUSB2_TUNE_SQUELCH_U 0x54
#define EUSB2_TUNE_USB2_PREEM 0x57
-#define QCOM_EUSB2_REPEATER_INIT_CFG(o, v) \
+#define QCOM_EUSB2_REPEATER_INIT_CFG(r, v) \
{ \
- .offset = o, \
+ .reg = r, \
.val = v, \
}
+enum reg_fields {
+ F_TUNE_USB2_PREEM,
+ F_TUNE_SQUELCH_U,
+ F_TUNE_IUSB2,
+ F_NUM_TUNE_FIELDS,
+
+ F_FORCE_VAL_5 = F_NUM_TUNE_FIELDS,
+ F_FORCE_EN_5,
+
+ F_EN_CTL1,
+
+ F_RPTR_STATUS,
+ F_NUM_FIELDS,
+};
+
+static struct reg_field eusb2_repeater_tune_reg_fields[F_NUM_FIELDS] = {
+ [F_TUNE_USB2_PREEM] = REG_FIELD(EUSB2_TUNE_USB2_PREEM, 0, 2),
+ [F_TUNE_SQUELCH_U] = REG_FIELD(EUSB2_TUNE_SQUELCH_U, 0, 2),
+ [F_TUNE_IUSB2] = REG_FIELD(EUSB2_TUNE_IUSB2, 0, 3),
+
+ [F_FORCE_VAL_5] = REG_FIELD(EUSB2_FORCE_VAL_5, 0, 7),
+ [F_FORCE_EN_5] = REG_FIELD(EUSB2_FORCE_EN_5, 0, 7),
+
+ [F_EN_CTL1] = REG_FIELD(EUSB2_EN_CTL1, 0, 7),
+
+ [F_RPTR_STATUS] = REG_FIELD(EUSB2_RPTR_STATUS, 0, 7),
+};
+
struct eusb2_repeater_init_tbl {
- unsigned int offset;
+ unsigned int reg;
unsigned int val;
};
@@ -48,11 +76,10 @@ struct eusb2_repeater_cfg {
struct eusb2_repeater {
struct device *dev;
- struct regmap *regmap;
+ struct regmap_field *regs[F_NUM_FIELDS];
struct phy *phy;
struct regulator_bulk_data *vregs;
const struct eusb2_repeater_cfg *cfg;
- u16 base;
enum phy_mode mode;
};
@@ -61,9 +88,9 @@ static const char * const pm8550b_vreg_l[] = {
};
static const struct eusb2_repeater_init_tbl pm8550b_init_tbl[] = {
- QCOM_EUSB2_REPEATER_INIT_CFG(EUSB2_TUNE_IUSB2, 0x8),
- QCOM_EUSB2_REPEATER_INIT_CFG(EUSB2_TUNE_SQUELCH_U, 0x3),
- QCOM_EUSB2_REPEATER_INIT_CFG(EUSB2_TUNE_USB2_PREEM, 0x5),
+ QCOM_EUSB2_REPEATER_INIT_CFG(F_TUNE_IUSB2, 0x8),
+ QCOM_EUSB2_REPEATER_INIT_CFG(F_TUNE_SQUELCH_U, 0x3),
+ QCOM_EUSB2_REPEATER_INIT_CFG(F_TUNE_USB2_PREEM, 0x5),
};
static const struct eusb2_repeater_cfg pm8550b_eusb2_cfg = {
@@ -93,7 +120,6 @@ static int eusb2_repeater_init(struct phy *phy)
{
struct eusb2_repeater *rptr = phy_get_drvdata(phy);
const struct eusb2_repeater_init_tbl *init_tbl = rptr->cfg->init_tbl;
- int num = rptr->cfg->init_tbl_num;
u32 val;
int ret;
int i;
@@ -102,17 +128,14 @@ static int eusb2_repeater_init(struct phy *phy)
if (ret)
return ret;
- regmap_update_bits(rptr->regmap, rptr->base + EUSB2_EN_CTL1,
- EUSB2_RPTR_EN, EUSB2_RPTR_EN);
+ regmap_field_update_bits(rptr->regs[F_EN_CTL1], EUSB2_RPTR_EN, EUSB2_RPTR_EN);
- for (i = 0; i < num; i++)
- regmap_update_bits(rptr->regmap,
- rptr->base + init_tbl[i].offset,
- init_tbl[i].val, init_tbl[i].val);
+ for (i = 0; i < rptr->cfg->init_tbl_num; i++)
+ regmap_field_update_bits(rptr->regs[init_tbl[i].reg],
+ init_tbl[i].val, init_tbl[i].val);
- ret = regmap_read_poll_timeout(rptr->regmap,
- rptr->base + EUSB2_RPTR_STATUS, val,
- val & RPTR_OK, 10, 5);
+ ret = regmap_field_read_poll_timeout(rptr->regs[F_RPTR_STATUS],
+ val, val & RPTR_OK, 10, 5);
if (ret)
dev_err(rptr->dev, "initialization timed-out\n");
@@ -131,10 +154,10 @@ static int eusb2_repeater_set_mode(struct phy *phy,
* per eUSB 1.2 Spec. Below implement software workaround until
* PHY and controller is fixing seen observation.
*/
- regmap_update_bits(rptr->regmap, rptr->base + EUSB2_FORCE_EN_5,
- F_CLK_19P2M_EN, F_CLK_19P2M_EN);
- regmap_update_bits(rptr->regmap, rptr->base + EUSB2_FORCE_VAL_5,
- V_CLK_19P2M_EN, V_CLK_19P2M_EN);
+ regmap_field_update_bits(rptr->regs[F_FORCE_EN_5],
+ F_CLK_19P2M_EN, F_CLK_19P2M_EN);
+ regmap_field_update_bits(rptr->regs[F_FORCE_VAL_5],
+ V_CLK_19P2M_EN, V_CLK_19P2M_EN);
break;
case PHY_MODE_USB_DEVICE:
/*
@@ -143,10 +166,10 @@ static int eusb2_repeater_set_mode(struct phy *phy,
* repeater doesn't clear previous value due to shared
* regulators (say host <-> device mode switch).
*/
- regmap_update_bits(rptr->regmap, rptr->base + EUSB2_FORCE_EN_5,
- F_CLK_19P2M_EN, 0);
- regmap_update_bits(rptr->regmap, rptr->base + EUSB2_FORCE_VAL_5,
- V_CLK_19P2M_EN, 0);
+ regmap_field_update_bits(rptr->regs[F_FORCE_EN_5],
+ F_CLK_19P2M_EN, 0);
+ regmap_field_update_bits(rptr->regs[F_FORCE_VAL_5],
+ V_CLK_19P2M_EN, 0);
break;
default:
return -EINVAL;
@@ -175,8 +198,9 @@ static int eusb2_repeater_probe(struct platform_device *pdev)
struct device *dev = &pdev->dev;
struct phy_provider *phy_provider;
struct device_node *np = dev->of_node;
+ struct regmap *regmap;
+ int i, ret;
u32 res;
- int ret;
rptr = devm_kzalloc(dev, sizeof(*rptr), GFP_KERNEL);
if (!rptr)
@@ -189,15 +213,22 @@ static int eusb2_repeater_probe(struct platform_device *pdev)
if (!rptr->cfg)
return -EINVAL;
- rptr->regmap = dev_get_regmap(dev->parent, NULL);
- if (!rptr->regmap)
+ regmap = dev_get_regmap(dev->parent, NULL);
+ if (!regmap)
return -ENODEV;
ret = of_property_read_u32(np, "reg", &res);
if (ret < 0)
return ret;
- rptr->base = res;
+ for (i = 0; i < F_NUM_FIELDS; i++)
+ eusb2_repeater_tune_reg_fields[i].reg += res;
+
+ ret = devm_regmap_field_bulk_alloc(dev, regmap, rptr->regs,
+ eusb2_repeater_tune_reg_fields,
+ F_NUM_FIELDS);
+ if (ret)
+ return ret;
ret = eusb2_repeater_init_vregs(rptr);
if (ret < 0) {
--
2.42.0
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