[PATCH 1/4] phy: qcom-qmp-combo: correct sm8550 PHY programming

[Dmitry Baryshkov]

On Wed, 6 Sept 2023 at 11:02, Neil Armstrong <neil.armstrong at linaro.org> wrote:
>
> On 06/09/2023 09:58, Dmitry Baryshkov wrote:
> > Move PCS_USB3_POWER_STATE_CONFIG1 register programming from pcs_tbl to
> > the pcs_usb_tbl, where it belongs. Also, while we are at it, correct the
> > offset of this register to point to 0x00, as expected.
>
> Konrad already sent this https://lore.kernel.org/all/20230829-topic-8550_usbphy-v1-1-599ddbfa094a@linaro.org/

Not quite. Or we'd need to land a separate fix for the register address.

>
> >
> > Fixes: 49742e9edab3 ("phy: qcom-qmp-combo: Add support for SM8550")
> > Fixes: 39bbf82d8c2b ("phy: qcom-qmp: pcs-usb: Add v6 register offsets")
> > Cc: Abel Vesa <abel.vesa at linaro.org>
> > Cc: stable at vger.kernel.org
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> > ---
> >   drivers/phy/qualcomm/phy-qcom-qmp-combo.c      | 2 +-
> >   drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h | 2 +-
> >   2 files changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > index cbb28afce135..41b9be56eead 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
> > @@ -859,7 +859,6 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_tbl[] = {
> >       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_PCS_TX_RX_CONFIG, 0x0c),
> >       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG1, 0x4b),
> >       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_EQ_CONFIG5, 0x10),
> > -     QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> >   };
> >
> >   static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
> > @@ -867,6 +866,7 @@ static const struct qmp_phy_init_tbl sm8550_usb3_pcs_usb_tbl[] = {
> >       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2, 0x07),
> >       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L, 0x40),
> >       QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_H, 0x00),
> > +     QMP_PHY_INIT_CFG(QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1, 0x68),
> >   };
> >
> >   static const struct qmp_phy_init_tbl qmp_v4_dp_serdes_tbl[] = {
> > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > index 9510e63ba9d8..5409ddcd3eb5 100644
> > --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-usb-v6.h
> > @@ -12,7 +12,6 @@
> >   #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG3         0xcc
> >   #define QPHY_USB_V6_PCS_LOCK_DETECT_CONFIG6         0xd8
> >   #define QPHY_USB_V6_PCS_REFGEN_REQ_CONFIG1          0xdc
> > -#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1     0x90
> >   #define QPHY_USB_V6_PCS_RX_SIGDET_LVL                       0x188
> >   #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_L                0x190
> >   #define QPHY_USB_V6_PCS_RCVR_DTCT_DLY_P1U2_H                0x194
> > @@ -23,6 +22,7 @@
> >   #define QPHY_USB_V6_PCS_EQ_CONFIG1                  0x1dc
> >   #define QPHY_USB_V6_PCS_EQ_CONFIG5                  0x1ec
> >
> > +#define QPHY_USB_V6_PCS_USB3_POWER_STATE_CONFIG1     0x00
> >   #define QPHY_USB_V6_PCS_USB3_LFPS_DET_HIGH_COUNT_VAL        0x18
> >   #define QPHY_USB_V6_PCS_USB3_RXEQTRAINING_DFE_TIME_S2       0x3c
> >   #define QPHY_USB_V6_PCS_USB3_RCVR_DTCT_DLY_U3_L             0x40
>


-- 
With best wishes
Dmitry