[PATCH] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink configuration

[Vinod Koul]

On 20-02-23, 15:12, Swapnil Jakhade wrote:
> Add register sequences for PCIe + SGMII PHY multilink configuration.
> This has been validated on TI J7 platforms.

This fails to apply for me, can you please rebase

-- 
~Vinod