[PATCH v2] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink configuration

Vinod Koul vkoul at kernel.org
Wed Apr 12 09:36:33 PDT 2023


On 03-04-23, 10:56, Swapnil Jakhade wrote:
> Add register sequences for PCIe + SGMII PHY multilink configuration.
> This has been validated on TI J7 platforms.

Applied, thanks

-- 
~Vinod



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