[PATCH 1/5] dt-bindings: phy: cadence-sierra: drop assigned-clocks

Vinod Koul vkoul at kernel.org
Wed Apr 12 09:21:03 PDT 2023


On 04-04-23, 21:01, Krzysztof Kozlowski wrote:
> The meta schema from DT schema already defines assigned-clocks, so there
> is no need for device schema to mention it at all.  There are also no
> benefits of having it here and a board could actually need more of clock
> assignments than the schema allows.

Applied all, thanks

> 
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski at linaro.org>
> ---
>  .../devicetree/bindings/phy/phy-cadence-sierra.yaml       | 8 --------
>  1 file changed, 8 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml
> index 6a09472740ed..1de699fe5306 100644
> --- a/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml
> @@ -61,14 +61,6 @@ properties:
>        - const: pll0_refclk
>        - const: pll1_refclk
>  
> -  assigned-clocks:
> -    minItems: 1
> -    maxItems: 2
> -
> -  assigned-clock-parents:
> -    minItems: 1
> -    maxItems: 2
> -
>    cdns,autoconf:
>      type: boolean
>      description:
> -- 
> 2.34.1

-- 
~Vinod



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