[PATCH v5 1/5] phy: qcom-qmp-pcie: split register tables into common and extra parts

[Johan Hovold]

On Mon, Sep 26, 2022 at 08:34:31PM +0300, Dmitry Baryshkov wrote:
> SM8250 configuration tables are split into two parts: the common one and
> the PHY-specific tables. Make this split more formal. Rather than having
> a blind renamed copy of all QMP table fields, add separate struct
> qmp_phy_cfg_tables and add two instances of this structure to the struct
> qmp_phy_cfg. Later on this will be used to support different PHY modes
> (RC vs EP).
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov at linaro.org>
> ---
>  drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 410 +++++++++++++----------
>  1 file changed, 226 insertions(+), 184 deletions(-)
> 
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> index 5be5348fbb26..dc8f0f236212 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
> @@ -1300,31 +1300,30 @@ static const struct qmp_phy_init_tbl sm8450_qmp_gen4x2_pcie_pcs_misc_tbl[] = {
>  	QMP_PHY_INIT_CFG(QPHY_V5_20_PCS_PCIE_G4_PRE_GAIN, 0x2e),
>  };
>  
> +struct qmp_phy_cfg_tables {
> +	const struct qmp_phy_init_tbl *serdes;
> +	int serdes_num;
> +	const struct qmp_phy_init_tbl *tx;
> +	int tx_num;
> +	const struct qmp_phy_init_tbl *rx;
> +	int rx_num;
> +	const struct qmp_phy_init_tbl *pcs;
> +	int pcs_num;
> +	const struct qmp_phy_init_tbl *pcs_misc;
> +	int pcs_misc_num;
> +};

> @@ -1459,14 +1458,16 @@ static const char * const sdm845_pciephy_reset_l[] = {
>  static const struct qmp_phy_cfg ipq8074_pciephy_cfg = {
>  	.lanes			= 1,
>  
> -	.serdes_tbl		= ipq8074_pcie_serdes_tbl,
> -	.serdes_tbl_num		= ARRAY_SIZE(ipq8074_pcie_serdes_tbl),
> -	.tx_tbl			= ipq8074_pcie_tx_tbl,
> -	.tx_tbl_num		= ARRAY_SIZE(ipq8074_pcie_tx_tbl),
> -	.rx_tbl			= ipq8074_pcie_rx_tbl,
> -	.rx_tbl_num		= ARRAY_SIZE(ipq8074_pcie_rx_tbl),
> -	.pcs_tbl		= ipq8074_pcie_pcs_tbl,
> -	.pcs_tbl_num		= ARRAY_SIZE(ipq8074_pcie_pcs_tbl),
> +	.tables = {
> +		.serdes		= ipq8074_pcie_serdes_tbl,
> +		.serdes_num	= ARRAY_SIZE(ipq8074_pcie_serdes_tbl),
> +		.tx		= ipq8074_pcie_tx_tbl,
> +		.tx_num		= ARRAY_SIZE(ipq8074_pcie_tx_tbl),
> +		.rx		= ipq8074_pcie_rx_tbl,
> +		.rx_num		= ARRAY_SIZE(ipq8074_pcie_rx_tbl),
> +		.pcs		= ipq8074_pcie_pcs_tbl,
> +		.pcs_num	= ARRAY_SIZE(ipq8074_pcie_pcs_tbl),
> +	},

This looks much better. Even improves readability here too.

>  	.clk_list		= ipq8074_pciephy_clk_l,
>  	.num_clks		= ARRAY_SIZE(ipq8074_pciephy_clk_l),
>  	.reset_list		= ipq8074_pciephy_reset_l,
 
> +static void qmp_pcie_lanes_init(struct qmp_phy *qphy, const struct qmp_phy_cfg_tables *tables)
> +{
> +	const struct qmp_phy_cfg *cfg = qphy->cfg;
> +	void __iomem *tx = qphy->tx;
> +	void __iomem *rx = qphy->rx;
> +
> +	if (!tables)
> +		return;
> +
> +	qmp_pcie_configure_lane(tx, cfg->regs,
> +				tables->tx, tables->tx_num, 1);

Nit: do you really need that line break?

Same comment applies throughout.

> +
> +	if (cfg->lanes >= 2)
> +		qmp_pcie_configure_lane(qphy->tx2, cfg->regs,
> +					tables->tx, tables->tx_num, 2);
> +
> +	qmp_pcie_configure_lane(rx, cfg->regs,
> +				tables->rx, tables->rx_num, 1);
> +	if (cfg->lanes >= 2)
> +		qmp_pcie_configure_lane(qphy->rx2, cfg->regs,
> +					tables->rx, tables->rx_num, 2);
> +}
 
Looks good otherwise:

Reviewed-by: Johan Hovold <johan+linaro at kernel.org>

Johan