RDY bit clarification
Keith Busch
keith.busch at intel.com
Sun Jan 14 18:12:54 PST 2018
On Mon, Jan 15, 2018 at 07:36:27AM +0530, muthu crazy wrote:
> My concern is Reading RDY bit will trigger a MemRD PCIe transcation
> which will add a delay for every command.
> So it will affect the overall performance.
Maybe I misunderstood what you're referring to. Are you looking at
nvmet_check_ctrl_status? The controller status is implemented in
software there and doesn't do MMIO to read it.
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