[PATCH v2 6/6] mtd: spi-nor: core: avoid odd length/address writes in 8D-8D-8D mode
Bough Chen
haibo.chen at nxp.com
Mon May 12 01:33:46 PDT 2025
> -----Original Message-----
> From: Miquel Raynal <miquel.raynal at bootlin.com>
> Sent: 2025年5月12日 15:57
> To: Pratyush Yadav <pratyush at kernel.org>
> Cc: Tudor Ambarus <tudor.ambarus at linaro.org>; Luke Wang
> <ziniu.wang_1 at nxp.com>; broonie at kernel.org; linux-kernel at vger.kernel.org;
> linux-mtd at lists.infradead.org; linux-spi at vger.kernel.org; michael at walle.cc;
> p.yadav at ti.com; richard at nod.at; vigneshr at ti.com; Bough Chen
> <haibo.chen at nxp.com>; Han Xu <han.xu at nxp.com>
> Subject: Re: [PATCH v2 6/6] mtd: spi-nor: core: avoid odd length/address writes
> in 8D-8D-8D mode
>
> Hello,
>
> On 07/05/2025 at 09:43:25 GMT, Pratyush Yadav <pratyush at kernel.org>
> wrote:
>
> > Hi Luke,
> >
> > On Tue, Apr 29 2025, Tudor Ambarus wrote:
> >
> >> On 4/29/25 10:03 AM, Luke Wang wrote:
> >>> Hi Pratyush,
> >>>
> >>> I'm following up on this patch series [1] Avoid odd length/address
> >>> read/ writes in 8D-8D-8D mode. While some of the series has been
> >>> merged, the patch 4-6 remains unmerged.
> >>>
> >>> In fact, we also encountered similar read/write issue of odd
> >>> address/ length with NXP FSPI controller (spi-nxp-fspi.c).
> >>> Currently, we handled the odd address/length in the controller
> >>> driver, but I think this should be a common issue in the octal dtr
> >>> mode. Was there a technical reason for not merging the core layer
> solution?
> >>
> >> I guess I stumbled on those small comments and did not consider the
> >> greater benefit of taking the patches. No one cared and we forgot
> >> about it. Please address the comments and resubmit.
> >
> > Yes, it should have been a simple next revision from me but apparently
> > it fell through the cracks. I do strongly agree that this should be
> > done in SPI NOR, and not in controller drivers. So it would be great
> > if you can respin the remaining patches of the series.
>
> The fact is that we will have octal DTR support in SPI NAND as well at some
> point, hence a common solution would be welcome as we will likely face similar
> problems when performing these unaligned accesses. I don't know how feasible
> it is yet, but if we have a fix for SPI NOR, we will need something similar for SPI
> NAND.
Currently for octal DTR SPI NAND, seems do not support 8D-8D-8D, I check winbond, only support 1S-1D-8D mode. SPI NAND and SPI NOR share spi-mem.c, and in spi-mem.c, spi_mem_default_supports_op(), for DTR mode, the command must be DTR, so do not support 1S-1D-8D mode. This is the problem I can see.
We have local patch to handle the odd/even length/address in flexspi driver, I will prepare to move these to spi-nor core and send out for review first, but for SPI-NAND DTR mode, may need further efforts.
Regards
Haibo Chen
>
> Thanks,
> Miquèl
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