[PATCH v2 6/6] mtd: spi-nor: core: avoid odd length/address writes in 8D-8D-8D mode

[Miquel Raynal]

Hello,

On 07/05/2025 at 09:43:25 GMT, Pratyush Yadav <pratyush at kernel.org> wrote:

> Hi Luke,
>
> On Tue, Apr 29 2025, Tudor Ambarus wrote:
>
>> On 4/29/25 10:03 AM, Luke Wang wrote:
>>> Hi Pratyush,
>>> 
>>> I'm following up on this patch series [1] Avoid odd length/address read/
>>> writes in 8D-8D-8D mode. While some of the series has been merged, the
>>> patch 4-6 remains unmerged.
>>> 
>>> In fact, we also encountered similar read/write issue of odd address/
>>> length with NXP FSPI controller (spi-nxp-fspi.c). Currently, we handled
>>> the odd address/length in the controller driver, but I think this should
>>> be a common issue in the octal dtr mode. Was there a technical reason
>>> for not merging the core layer solution?
>>
>> I guess I stumbled on those small comments and did not consider the
>> greater benefit of taking the patches. No one cared and we forgot about
>> it. Please address the comments and resubmit.
>
> Yes, it should have been a simple next revision from me but apparently
> it fell through the cracks. I do strongly agree that this should be done
> in SPI NOR, and not in controller drivers. So it would be great if you
> can respin the remaining patches of the series.

The fact is that we will have octal DTR support in SPI NAND as well at some
point, hence a common solution would be welcome as we will likely face
similar problems when performing these unaligned accesses. I don't know
how feasible it is yet, but if we have a fix for SPI NOR, we will need
something similar for SPI NAND.

Thanks,
Miquèl