CYRS17B spi-nor flash support in ubi/ubifs

[Tudor Ambarus]

+ Pratyush & Michael

On 3/6/25 6:34 AM, Takahiro Kuwano wrote:
> Hello,

Hi!

> 
> Infineon introduced a SPI-NOR flash chip named CYRS17B [1], which has untypical
> features comparing to others SPI-NOR flash chips. I would like to ask you to
> share your thoughts about possibility of UBI/UBIFS support this flash chip.
> 
> Features different from typical SPI-NOR flash are:
>   #1 Inverted erase polarity. The data after erase is 0x00 instead of 0xFF.
>   #2 Larger erase block size, 1MB (or 8MB). Typical SPI-NOR has 4KB to 256KB.
>   #3 Larger program page size, 2KB. Typical SPI-NOR has 256B or 512B page.
>   #4 Programming partial page initiates internal page erase.

Details on #4 from datasheet:
```
For programs of less than 2048 bytes, the bytes of the addressed page
that are not part of the user input data will be read from the Flash
memory, ECC corrected and re-written to the Flash.
'''

> 
> Obviously, #1 is the biggest obstacle as UBI/UBIFS (and all other Flash File
> Systems) are designed with an assumption, "0xFF as erase (blank) state".

I think you shall inform the upper layers of the inverted erase polarity
so that they can act on it.
> 
> #2 means there are less number of PEBs. I think this affects storage efficiency.

Of course. There's no point in having UBI dealing with 8 PEBs. Given my
comment on #4, I think we shall consider PEBs at 2K and treat the 1 MB,
8MB, and full chip erase as optimizations (partial/full chip erase) to
the implicit page erase. The implicit page erase becomes the smallest
eraseblock possible.
2 KB Page Programming -> 64 KBps
1 MB, 8MB or full chip erase -> 47.5 MBps

> 
> #3 and #4 seems not to be matter, if I configure UBI minimum IO size to 2KB to
> avoid partial page programming.

No, please don't.

Also, you also need to inform the upper layer that's no point in doing
an erase before programming, so that they don't first program inverted
erase state and then program again the actual data to write. This can be
done in a single step by your flash.

I think this is the only choice you have on putting a filesystem on this
SPI NOR. Curious whether the other guys agree.

Cheers,
ta

>  
> [1] https://www.infineon.com/dgdl/Infineon-
> CYRS17B512_512_MB_64_MB_SERIAL_NOR_FLASH_SPI_QSPI_3-DataSheet-v07_00-
> EN.pdf?fileId=8ac78c8c8fc2dd9c01900eee733d45f3