[PATCH 2/2] mtd: spinand: Add support for SkyHigh S35ML-3 family

[Miquel Raynal]

On 31/10/2024 at 11:21:55 +09, tkuw584924 at gmail.com wrote:

> From: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
>
> SkyHigh S35ML01G300, S35ML01G301, S35ML02G300, and S35ML04G300 are 1Gb,
> 2Gb, and 4Gb SLC SPI NAND flash family. This family of devices has
> on-die ECC which parity bits are stored to hidden area. In this family
> the on-die ECC cannot be disabled so raw access needs to be prevented.
>
> Link: https://www.skyhighmemory.com/download/SPI_S35ML01_04G3_002_19205.pdf?v=P
> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
> Signed-off-by: KR Kim <kr.kim at skyhighmemory.com>

Please have a look to the documentation regarding how to document
authorship, because currently the tags are wrong.

...

> +static int skyhigh_spinand_init(struct spinand_device *spinand)
> +{
> +	/* A0[1] must be enabled before block unlock */

What is A0[1] ? It does not mean anything here, please be more explicit.

> +	return spinand_write_reg_op(spinand, REG_BLOCK_LOCK,
> +				    SKYHIGH_CONFIG_PROTECT_EN);
> +}
> +
> +static const struct spinand_manufacturer_ops skyhigh_spinand_manuf_ops = {
> +	.init = skyhigh_spinand_init,
> +};

Otherwise this looks goot do me.

Thanks,
Miquèl