[SkyHigh Memory SPI NAND Driver]

[Mohamed Sardi]

Dear Miquel,
We understand that your plan to turn off the ECC for Bad Block marking and checking... for Linux V6...

We also understand that in Linux5.4 the driver did not have ECC control...

My question is as follow:
1) From which version of Linux ,the ECC control was added in the driver? Was it implemented in Linux 5.xx?
2) What was the leading reason/customer leading to turn off the ECC for bad block marking/checking?
Note: We saw that MTK was turning off the ECC for Bad block marking on Linux 5.4...

3) We think that the ECC should be turned off for bad block marking and checking, is it possible for us to provide a patch/driver (SHM_core.c) for Linux version version 6...  where SHM devices keep the ECC on...
 

Thanks
Mohamed 

On 1/24/24, 1:07 PM, "Miquel Raynal" <miquel.raynal at bootlin.com <mailto:miquel.raynal at bootlin.com>> wrote:


Hi Mohamed,


moh.sardi at skyhighmemory.com <mailto:moh.sardi at skyhighmemory.com> wrote on Tue, 23 Jan 2024 01:01:53 +0000:


> Hello Miquel,
> 
> I have a question for bad block marking and checking on Linux... and ECC.
> 
> Do you know how bad block marking is done?
> 
> 1) Bad Block Marking: Are your writing non FF on the first 2 bytes of the OOB? Do you keep Device ECC ON or OFF?
> 2) Bad block Checking: Do you read the first 2 bytes of the OOB with ECC OFF or do you keep ECC ON?


In the raw NAND world, for legacy reasons these checks and writes are
done with the correction engine enabled. But I believe you are
interested into the SPI-NAND side only, and in this case the ECC is
always disabled:


Marking:
https://elixir.bootlin.com/linux/v6.8-rc1/source/drivers/mtd/nand/spi/core.c#L768 <https://elixir.bootlin.com/linux/v6.8-rc1/source/drivers/mtd/nand/spi/core.c#L768>
Checking:
https://elixir.bootlin.com/linux/v6.8-rc1/source/drivers/mtd/nand/spi/core.c#L733 <https://elixir.bootlin.com/linux/v6.8-rc1/source/drivers/mtd/nand/spi/core.c#L733>


Thanks,
Miquèl