[PATCH v2 2/2] mtd: spinand: micron: fixing the offset for OOB

[Miquel Raynal]

Hi Martin,

mmkurbanov at sberdevices.ru wrote on Mon, 4 Sep 2023 17:20:59 +0300:

> Hi Miquel,
> 
> On 24.08.2023 12:35, Martin Kurbanov wrote:
> > 
> > 
> > On 23.08.2023 14:39, Miquel Raynal wrote:
> >> Hi Martin,
> >>
> >> mmkurbanov at sberdevices.ru wrote on Wed, 23 Aug 2023 14:33:57 +0300:
> >>
> >>> Hi Miquel,
> >>>
> >>> On 23.08.2023 11:41, Miquel Raynal wrote:
> >>>> Hi Martin,
> >>>>
> >>>> I don't think the four bytes have any "bad block specific" meaning. In
> >>>> practice, the datasheet states:
> >>>>
> >>>> 	Value programmed for bad block at the first byte of spare
> >>>> 	area: 00h
> >>>>
> >>>> So only the first byte is used to mark the block bad, the rest is
> >>>> probably marked "reserved" for simplicity. I believe we should keep the
> >>>> current layout because it would otherwise break users for no real
> >>>> reason.  
> >>>
> >>> I agree with you that this can break the work of users who use OOB.
> >>> However, I believe it would be more appropriate to use an offset of 4,
> >>> as the micron chip can use all 4 bytes for additional data about the
> >>> bad block. So, there is a non-zero probability of losing OOB data in
> >>> the reserved area (2 bytes) when the hardware chip attempts to mark
> >>> the block as bad.
> >>
> >> Is this really a process the chip can do? Aren't bad blocks factory
> >> marked only?
> > 
> > Actually, there is my understanding, I’m not sure exactly.
> 
> I tested with an offset of 2, no read/write errors were detected
> (including read/write to OOB). But I don't have a flash chip with
> factory bad blocks yet, when I find such a flash, I will report the
> results.

Ok.

> Do I need to send the v3 of the patch with only first commit ("correct
> bitmask for ecc status")?

Yes please, with Frieder's comments fixed.

Thanks,
Miquèl