EM016LXQAB313CS1T
Angelo Dureghello
angelo at kernel-space.org
Thu Oct 5 05:13:18 PDT 2023
Hi Michael,
On 05/10/23 10:32 AM, Michael Walle wrote:
> Hi,
>
>> as far as you know,
>> is there some development ongoing for the EM016LXQAB313CS1T
>> mram ?
>
> No, in fact, we'd like to get rid of these MRAM devices as they don't
> have anything to do with NOR flashes - or move them over to the at25
> driver.
>
> Now I see that this part is rather new, supports faster modes and
> even DTR, emulates erase op codes, etc. But they are lacking SFDP support..
>
> You might get away with adding an entry to the database with it's ID.
> But please *don't* use the SPI_NOR_NO_ERASE.
>
> I'm curious, do you have a board with that chip? If so, why don't you
> use a cheaper NOR flash? Genuine question.
>
thanks a lot for the clarifications, i am working on a custom
hardware that should mount this chip, not sure it can be
changed at this phase.
Supposing i can have it working by the spi-nor driver,
is it possible to see the device as memory mapped to be
accessed from userspace ?
>> On mainline i only see
>>
>> /* Everspin MRAMs (non-JEDEC) */
>> { "mr25h128" }, /* 128 Kib, 40 MHz */
>> { "mr25h256" }, /* 256 Kib, 40 MHz */
>> { "mr25h10" }, /* 1 Mib, 40 MHz */
>> { "mr25h40" },
>
> Btw, have a look at the new linux-next. that format has changed.
>
Sure thanks,
>
> -michael
Regards,
--
Angelo Dureghello
w: www.kernel-space.org
e: angelo at kernel-space.org
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