[PATCH v2 2/8] mtd: spi-nor: sfdp: Extract volatile register offset from SCCR map

Tudor Ambarus tudor.ambarus at linaro.org
Wed Mar 1 21:25:26 PST 2023



On 08.02.2023 07:53, tkuw584924 at gmail.com wrote:
> From: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
> 
> The volatile register offset resides in the 1st DWORD of SCCR map. Allocate
> the table and copy the offset value.
> 
> The table may be allocated when the SCCR map for multi-chip is parsed.
> Since we cannot assume SCCR parse is always in ahead of SCCR multi-chip,
> we need to check if the table is already allocated or not.
> 
> Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
> ---
>   drivers/mtd/spi-nor/sfdp.c | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/sfdp.c b/drivers/mtd/spi-nor/sfdp.c
> index 3acc01c3a900..e5b5776d8172 100644
> --- a/drivers/mtd/spi-nor/sfdp.c
> +++ b/drivers/mtd/spi-nor/sfdp.c
> @@ -1215,6 +1215,7 @@ static int spi_nor_parse_profile1(struct spi_nor *nor,
>   static int spi_nor_parse_sccr(struct spi_nor *nor,
>   			      const struct sfdp_parameter_header *sccr_header)
>   {
> +	struct spi_nor_flash_parameter *params = nor->params;
>   	u32 *dwords, addr;
>   	size_t len;
>   	int ret;
> @@ -1231,6 +1232,17 @@ static int spi_nor_parse_sccr(struct spi_nor *nor,
>   
>   	le32_to_cpu_array(dwords, sccr_header->length);
>   
> +	/* Address offset for volatile registers (die 0) */
> +	if (!params->vreg_offset) {
> +		params->vreg_offset = devm_kmalloc(nor->dev, sizeof(*dwords),
> +						   GFP_KERNEL);
> +		if (!params->vreg_offset) {
> +			ret = -ENOMEM;
> +			goto out;
> +		}
> +	}
> +	params->vreg_offset[0] = dwords[0];

params->vreg_offset[0] = dwords[SFDP_DWORD(1)];

it helps readers match the code with the standard

> +
>   	if (FIELD_GET(SCCR_DWORD22_OCTAL_DTR_EN_VOLATILE,
>   		      dwords[SFDP_DWORD(22)]))
>   		nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE;



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