[PATCH v4 0/6] mtd: spi-nor: Add support for Cypress s25hl-t/s25hs-t

[Takahiro Kuwano]

Hi Tudor,

On 4/1/2021 3:09 PM, Tudor.Ambarus at microchip.com wrote:
> Hi,
> 
> On 3/19/21 8:51 AM, tkuw584924 at gmail.com wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>>
>> From: Takahiro Kuwano <Takahiro.Kuwano at infineon.com>
>>
>> The S25HL-T/S25HS-T family is the Cypress Semper Flash with Quad SPI.
>>
>> The summary datasheets can be found in the following links.
>> https://www.cypress.com/file/424146/download (256Mb/512Mb/1Gb, single die)
>> https://www.cypress.com/file/499246/download (2Gb/4Gb, dual/quad die)
>>
>> The full version can be found in the following links (registration
>> required).
>> https://community.cypress.com/t5/Semper-Flash-Access-Program/Datasheet-Semper-Flash-with-Quad-SPI/ta-p/260789?attachment-id=19522
>> https://community.cypress.com/t5/Semper-Flash-Access-Program/Datasheet-2Gb-MCP-Semper-Flash-with-Quad-SPI/ta-p/260823?attachment-id=29503
> 
> Takahiro, looks like I can't access the dual/quad die full datasheet, not enough rights,
> even after creating an account.
> 
My colleague helped on this. I hope you could access the datasheet.

> How are multi die ops handled when crossing a die boundary?
> 
The existing erase/write ops are done by sector/page size alignment and
never cross a die boundary. The read ops does not care about die boundary
but still works because the Semper dual/quad die parts continue to output
data from next die when crossing a die boundary.

>>
>> Tested on Xilinx Zynq-7000 FPGA board.
> 
> Have you tried to erase/read/write multiple dies with a single request?
> 
Yes, I did 'mtd_debug erase/write/read' with address ranges that involve
two dies. You can find errata info in the datasheet about cross-die read.
My test does not cover the trigger condition of the failure actually.
I will submit another patch that work around the issue as needed.

Best Regards,
Takahiro