[PATCH 3/4] mtd: spi-nor: aspeed: configure chip window on AHB bus

[Cyrille Pitchen]

Le 20/04/2017 à 15:30, Marek Vasut a écrit :
> On 04/20/2017 01:56 PM, Cédric Le Goater wrote:
>> The segment registers of the SMC controller provide a way to configure
>> the mapping windows of the chips on the AHB bus. The settings are
>> required to be correct when the controller operates in Command mode,
>> which is the case for DMAs and the LPC mapping.
>>
>> This tries to set the segment registers of each chip depending on the
>> size of the flash device and depending on the previous segment
>> settings, in order to have a contiguous window across multiple chips.
>>
>> Unfortunately, the AST2500 SPI controller has a bug and it is not
>> possible to configure a full 128MB window for a chip of the same
>> size. The window size needs to be restricted to 120MB. This issue only
>> applies to CE0.
>>
>> Signed-off-by: Cédric Le Goater <clg at kaod.org>
> 
> Reviewed-by: Marek Vasut <marek.vasut at gmail.com>
> 

Applied to the spi-nor/next branch of l2-mtd

Thanks!