[PATCH v4 14/16] phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module

[Hauke Mehrtens]

On 06/20/2017 01:39 AM, Andy Shevchenko wrote:
> On Tue, Jun 20, 2017 at 1:26 AM, Hauke Mehrtens <hauke at hauke-m.de> wrote:
>> This driver starts the DWC2 core(s) built into the XWAY SoCs and provides
>> the PHY interfaces for each core. The phy instances can be passed to the
>> dwc2 driver, which already supports the generic phy interface.
>>
>> Signed-off-by: Hauke Mehrtens <hauke at hauke-m.de>
>> Cc: Kishon Vijay Abraham I <kishon at ti.com>
>> ---
>>  .../bindings/phy/phy-lantiq-rcu-usb2.txt           |  41 ++++
>>  arch/mips/lantiq/xway/sysctrl.c                    |  24 +-
>>  drivers/phy/Kconfig                                |   8 +
>>  drivers/phy/Makefile                               |   1 +
>>  drivers/phy/phy-lantiq-rcu-usb2.c                  | 272 +++++++++++++++++++++
>>  5 files changed, 334 insertions(+), 12 deletions(-)
>>  create mode 100644 Documentation/devicetree/bindings/phy/phy-lantiq-rcu-usb2.txt
>>  create mode 100644 drivers/phy/phy-lantiq-rcu-usb2.c
>>

....

>> +       /*
>> +        * Power on the USB PHY. We have to do it early because
>> +        * otherwise the second core won't turn on properly.
>> +        */
>> +       ret = clk_prepare_enable(priv->phy_gate_clk);
>> +       if (ret) {
>> +               dev_err(dev, "failed to enable PHY gate\n");
> 
> Disable and unprepare control clock.

Done, is there no devm_ version of this?

>> +               return ret;
>> +       }

...

>> +       ret = ltq_rcu_usb2_start_cores(priv);
>> +       if (ret)
>> +               return ret;
>> +
> 
>> +       provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
>> +
>> +       if (IS_ERR(provider))
> 
> Remove line in between.

Done

>> +               return PTR_ERR(provider);
>> +
>> +       dev_set_drvdata(priv->dev, priv);
>> +       return 0;
> 
> You need to carefully check error path that you disabled clocks.

Done

>> +}
>> +

.....

Hauke