[PATCH] mtd: nand: davinci: Reinitialize the HW ECC engine in 4bit hwctl

Boris Brezillon boris.brezillon at free-electrons.com
Mon Aug 29 02:59:30 PDT 2016


On Mon, 29 Aug 2016 07:45:49 +0000
Karl Beldan <kbeldan at baylibre.com> wrote:

> This fixes subpage writes when using 4-bit HW ECC.
> 
> There has been numerous reports about ECC errors with devices using this
> driver for a while.  Also the 4-bit ECC has been reported as broken with
> subpages in [1] and with 16 bits NANDs in the driver and in mach* board
> files both in mainline and in the vendor BSPs.
> 
> What I saw with 4-bit ECC on a 16bits NAND (on an LCDK) which got me to
> try reinitializing the ECC engine:
> - R/W on whole pages properly generates/checks RS code
> - try writing the 1st subpage only of a blank page, the subpage is well
>   written and the RS code properly generated, re-reading the same page
>   the HW detects some ECC error, reading the same page again no ECC
>   error is detected
> 
> Note that the ECC engine is already reinitialized in the 1-bit case.
> 
> Tested on my LCDK with UBI+UBIFS using subpages.
> This could potentially get rid of the issue workarounded in [1].
> 
> [1] 28c015a9daab ("mtd: davinci-nand: disable subpage write for keystone-nand")
> 
> Signed-off-by: Karl Beldan <kbeldan at baylibre.com>

Acked-by: Boris Brezillon <boris.brezillon at free-electrons.com>

Brian, can you take this patch directly in your tree. If that's not
possible, let me know, I'll add the Fixes and Cc:stable tags and take
it for 4.9.

Thanks,

Boris

> ---
>  drivers/mtd/nand/davinci_nand.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c
> index cc07ba0..27fa8b8 100644
> --- a/drivers/mtd/nand/davinci_nand.c
> +++ b/drivers/mtd/nand/davinci_nand.c
> @@ -240,6 +240,9 @@ static void nand_davinci_hwctl_4bit(struct mtd_info *mtd, int mode)
>  	unsigned long flags;
>  	u32 val;
>  
> +	/* Reset ECC hardware */
> +	davinci_nand_readl(info, NAND_4BIT_ECC1_OFFSET);
> +
>  	spin_lock_irqsave(&davinci_nand_lock, flags);
>  
>  	/* Start 4-bit ECC calculation for read/write */




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