[PATCH 1/1 v2] driver:mtd:spi-nor: Add Micron quad I/O support

[Marek Vasut]

On Sunday, September 28, 2014 at 03:59:42 AM, bpqw wrote:
> For Micron spi norflash,you can enable
> Quad spi transfer by clear EVCR(Enhanced
> Volatile Configuration Register) Quad I/O
> protocol bit.

OK, this information is nice and all, but what does this patch do? I can't learn 
this information from the commit message as it is, can I ? And , the purpose of 
the commit message is exactly to summarize the change the patch implements.

> Signed-off-by: bean huo <beanhuo at micron.com>
> ---
>  v1-v2:modified to that capture wait_till_ready()
> 	return value,if error,directly return its
> 	the value.
> 
>  drivers/mtd/spi-nor/spi-nor.c |   46
> +++++++++++++++++++++++++++++++++++++++++ include/linux/mtd/spi-nor.h   | 
>   6 ++++++
>  2 files changed, 52 insertions(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index b5ad6be..0c3b4fd 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -878,6 +878,45 @@ static int spansion_quad_enable(struct spi_nor *nor)
>  	return 0;
>  }
> 
> +static int micron_quad_enable(struct spi_nor *nor)
> +{
> +	int ret, val;
> +
> +	ret = nor->read_reg(nor, SPINOR_OP_RD_EVCR, &val, 1);
> +	if (ret < 0) {
> +		dev_err(nor->dev, "error %d reading EVCR\n", ret);
> +		return -EINVAL;
> +	}
> +
> +	write_enable(nor);
> +
> +	/* set EVCR ,enable quad I/O */
> +	nor->cmd_buf[0] = val & ~EVCR_QUAD_EN_MICRON;
> +	ret = nor->write_reg(nor, SPINOR_OP_WD_EVCR, nor->cmd_buf, 1, 0);
> +	if (ret < 0) {
> +		dev_err(nor->dev,
> +			"error while writing EVCR register\n");
> +		return -EINVAL;

Why not just "return ret;" ?
[...]