[V6 PATCH 1/1] driver:mtd:spi-nor: Add quad I/O support for Micron spi nor

Bean Huo 霍斌斌 (beanhuo) beanhuo at micron.com
Mon Dec 15 06:24:44 PST 2014


>> +       { "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ) },
>> +       { "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
>> +       { "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
>> +       { "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },

>Even the CodingStyle says exceeding 80 columns can be accepted:

>> Statements longer than 80 columns will be broken into sensible chunks, 
>> unless exceeding 80 columns significantly increases readability and 
>> does not hide information.

> Various hardware tables often happen to use more chars/line.

Thanks for response.

Dear MTD maintainer:

How about this patch? And it has updated to sixth version.
Is there other spaces to be updated?



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