[V6 PATCH 1/1] driver:mtd:spi-nor: Add quad I/O support for Micron spi nor

[Rafał Miłecki]

On 8 December 2014 at 09:50, Bean Huo 霍斌斌 (beanhuo) <beanhuo at micron.com> wrote:
> This patch is based on the latest l2-mtd,I don't know if can pass?
> I have one question is that about following code.
> I have added our Mciron quad flag into spi_nor_ids[] table,but line over 80 characters,
> If I divided one line into two lines,this will make spi_nor_ids[] table look ugly.I also find that
> There are other venders configure line that also over 80 characters,such as Spansion,Catalyst.
> So I don't divide my following configure line into two two lines,I don't know if this can
> Be accepted?
>
> +       { "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K | SPI_NOR_QUAD_READ) },
> +       { "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
> +       { "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
> +       { "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },

Even the CodingStyle says exceeding 80 columns can be accepted:

> Statements longer than 80 columns will be broken into sensible chunks, unless
> exceeding 80 columns significantly increases readability and does not hide
> information.

Various hardware tables often happen to use more chars/line.