Page corruption when writing non-sequential pages in an MLC NAND eraseblock

Ricard Wanderlof ricard.wanderlof at axis.com
Thu Oct 3 11:26:11 EDT 2013


On Thu, 3 Oct 2013, Romain Izard wrote:

> It's right there in the datasheet for both MLC manufacturers I have worked with.
> And it seems that even SLC flash with large blocks [1] can also have the
> same constraint.
>
> There is very interesting technical presentation from Micron [2] that explains
> all the issues with NAND flash, and that states that the write order
> is necessary
> to reduce the 'program disturb' issues.
>
> [1] http://permalink.gmane.org/gmane.linux.drivers.mtd/20182
> [2] https://www.micron.com/~/media/Documents/Products/Presentation/flash_mem_summit_jcooke_inconvenient_truths_nand.pdf

Interesting, I hadn't heard that sequential writes were a requirement for 
large-page SLC flash. I just checked the data sheet for a Samsung K9F1208 
and it doesn't mention it at all. That's just one of many of course, and 
it could still be that sequential writes reduce the likelyhood of program 
disturb errors.

/Ricard
-- 
Ricard Wolf Wanderlöf                           ricardw(at)axis.com
Axis Communications AB, Lund, Sweden            www.axis.com
Phone +46 46 272 2016                           Fax +46 46 13 61 30



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