how to support 4096+224 page size with plat_nand ?

[STOTTS Timothy]

Thank you Brian (Norris).

Yes, the chip appears to be correctly detected, including all metrics. I am using kernel 3.0.8-ADI-2011R1.

How can I determine a valid ECC layout for OOB size of 224? A copy-and-paste of a layout found on the Internet resulted in the driver marking all blocks as "bad block" on the NAND Flash. (We have additional chips to work with.) My chip uses software ECC. Does it require BCH?

My datasheet does not specify ECC as number of OOB bytes per 4096 bytes, as such, but rather as a number of bits per a smaller number of bytes. Does that matter?

Timothy

-----Original Message-----
From: Brian Norris [mailto:computersforpeace at gmail.com]
Sent: Friday, March 16, 2012 7:17 PM
To: Brian Foster
Cc: STOTTS Timothy; linux-mtd at lists.infradead.org
Subject: Re: how to support 4096+224 page size with plat_nand ?

On Fri, Mar 16, 2012 at 7:05 AM, Brian Foster <brian.foster at maxim-ic.com> wrote:
>  We have also used 4K + 224 NAND (not sure if the
>  same part or not) with 'plat_nand' (and also with
>  our own driver which uses our chip's ECC engine),
>  in a v2.6.36-based Linux kernel.  (The kernel's
>  version _may_ be important, since I _think_ some
>  later kernels directly support 224 (and 218 and
>  maybe 256) OOB sizes;  and/or correctly detecting
>  the eraseblock size.)

Timothy's part is an ONFI-compliant device, and I think ONFI support
was added after 2.6.36.

>  We didn't bother using the full 224-byts of OOB,
>  but instaed are treating the device as having
>  only 128-bytes of OOB.  Works fine, albeit we
>  did have to add the part to the nand_flash_ids[]
>  table since the eraseblock size wasn't correctly
>  detected.

In recent kernels, you shouldn't have to modify anything for the
size/eraseblock/etc. to be *detected* properly since ONFI will find
it, but depending on the driver, the OOB size may not be supported.
For instance, since the plat_nand driver uses the nand_base layouts
(as you noticed), you need to at least supply *some* ECC layout that
is valid. Just make sure the ECC strength is high enough for your
device...

Brian

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