question about write/read sub-page with BCH algorithm or disable sub-page operation when using ubifs

[Iwo Mergler]

On Tue, 31 Jul 2012 17:23:25 +1000
曹荣荣 <caorr1980 at gmail.com> wrote:

> Hello,
> I have a question about sub-page when using ubifs, so ask help from
> here.
> 
> Let me take a 2048-size page with 4 sub-page Nand as example.
> 
> The documentation said, "To write a sub-page, the driver may actually
> write whole NAND page, but put 0xFF bytes to the sub-pages which are
> not relevant to this operation."
> It's OK for some ECC algorithms such as Hamming algorithm, because the
> ECC codes generated by Hamming algorithm for the 0xFF data are still
> 0xFF'ed. However, if we use BCH algorithm, the generated ECC codes for
> 0xFF data will be not 0xFF'ed, and they will overwrite the previous
> OOB data, so error will be happened when reading next time.
> 
> I try to resolve this issue by disabling sub-page operation, so I add
> NAND_NO_SUBPAGE_WRITE into chip->options, but chip->options will be
> flushed in nand_get_flash_type() funtion (chip->options &=
> ~NAND_CHIPOPTIONS_MSK).
> 
> So, my question is, How can I do to write/read sub-page with BCH
> algorithm, or to disable sub-page operation?
> 

Without sub-page support, UBI overhead doubles from about 1.5% to
over 3%, so sub-page support is worth considering.

Disclaimer: Some of the below is from memory only - read the source,
especially nand_base.c. Some details will depend on kernel version.

I'll assume for the moment that you have a hardware ECC controller
with BCH support. There shouldn't be a problem with software BCH.

Most hardware ECC controllers ignore FLASH command and address cycles,
although some will reset the ECC calculation during READ PAGE (0x00)
and PROGRAM PAGE (0x80) commands.

This means that if you can reset the ECC controller in software,
you can support sub-page reads & writes. You may have to change
the OOB layout and break compatibility with your previous versions.
This will usually also affect the boot loader.

Writing a sub-page is a matter of making sure that all the areas
of the page (+OOB) you don't intend to write are filled with 0xFF
bytes. The OOB must contain separate ECC byte fields for each
sub-page.

I'm not sure, but I think sub-page capable NAND will default
the page buffer to 0xFF internally. So you can jump to the
sub-page offset (Random Data Input, 0x85), reset the ECC,
write the data while the ECC controller is listening, then
issue another Random Data Input command to jump to the
correct OOB offset and write out the ECC bytes.

For sub-page read, you make sure that the ECC is reset, read
the subpage from the right offset, jump to the ECC value in
OOB and process. Depending on your controller, at this point
you either read the ECC bytes and get a syndrome or you read
the ECC register and the OOB bytes (in that order) and compare.

You need to make sure that pages written as whole pages can be
read as sub-pages and vice-versa. So you have to provide
ecc.write_page and ecc.read_page functions as well, using the
same OOB layout.

This means saving & resetting ECC bytes at sub-page boundaries
and possibly jumping between sub-pages and corresponding ECC
bytes during syndrome reads.


Best regards,

Iwo

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