[PATCH v2 2/3] NAND: Add new ECC mode - ECC_HW_OOB_FIRST

[Vitaly Wool]

On Wed, Jun 17, 2009 at 12:23 AM, <s-paulraj at ti.com> wrote:
> From: Sandeep Paulraj <s-paulraj at ti.com>
>
> The patch applies to linux-mtd GIT tree
>
> This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
> support 4-bit ECC on TI DaVinci devices with large page (up to 4K) NAND
> chips. This ECC mode is similar to NAND_ECC_HW, with the exception of
> read_page API that first reads the OOB area, reads the data in chunks, feeds
> the ECC from OOB area to the ECC hw engine and perform any correction on the
> data as per the ECC status reported by the engine.
>
> "ECC_HW_OOB_FIRST" name suggested by Thomas Gleixner

What I'd like to state is that we're starting to have so many
HW_OOB_XXX variants that it gets ridiculous. I'm sure we've come to a
point where we need to reconsider the base method for handing data and
ECC. Especially given the DMA capabilities of the most modern NAND
controllers.

Thanks,
   Vitaly