Problem with Micron 256 MB NAND on 440EPx
Andrew E. Mileski
andrewm at isoar.ca
Mon May 26 15:44:45 EDT 2008
Andrew E. Mileski wrote:
> I'm looking for some pointers in the right direction with this problem
> I'm having with Micron 256 MB NAND part MT29F2G08AACWP:C with a JFFS2
> filesystem on a AMCC PowerPC 440EPx board using the NDFC driver.
>
snip
>
> Write verify error (ECC correction failed) at 0e480000. Wrote:
> 00000000: 19 85 e0 02 00 00 04 44 c0 83 e7 3a 00 00 00 03
> ...
> Read back:
> 00000000: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
> 00000010: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
> 00000020: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
> 00000030: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
> 00000040: 19 85 e0 02 00 00 04 44 c0 83 e7 3a 00 00 00 03
>
> Notice that the data appears to be "offset" by 64 bytes, which just
> happens to be the size of the OOB, but that could be a coincidence.
I've now verified with a logic analyzer that the NFREN strobe is active
during when NFRDYBSY is low (NAND chip is busy), and latching bogus data
as a result (the bus has pull-ups so 0xff).
I've verified the pin is connected, and I have seen transitions on it
through the PPC register.
Any suggestions on what I might be missing still?
Thanks.
--
Andrew E. Mileski
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