Support of removable MTD devices and other advanced features (follow-up from lkml)

[Jörn Engel]

On Sun, 25 May 2008 17:35:56 +0100, Jamie Lokier wrote:
> 
> I mean that progressive writing may cause more wear towards the
> beginning of _each_ eraseblock, because you'll write more often at the
> start of each eraseblock than the end.  That's if wear is at all a
> function of writes, and not solely erase operations.

I don't have any numbers on that.  Iirc on NOR flash, erase voltage is
significantly higher than write voltage, so erase likely dominate the
wear.  NAND flash may behave differently.

> There's another curious thought: do individual flash bit cells wear
> out more quickly when written to "0" or left at "1"?  I doubt it, but
> if it did make a difference, it would make a case for xoring data with
> predictable pseudo-random bits.

Might make a nice article for the April edition of some magazine. ;)

Jörn

-- 
Anything that can go wrong, will.
-- Finagle's Law