[PATCHv2] powerpc: Describe memory-mapped RAM&ROM chips OF bindings
Laurent Pinchart
laurentp at cse-semaphore.com
Tue Apr 1 08:39:04 EDT 2008
On Tuesday 01 April 2008 11:18, Trent Piepho wrote:
> On Tue, 1 Apr 2008, Laurent Pinchart wrote:
> > On Monday 31 March 2008 19:06, Sergei Shtylyov wrote:
> >>> p) Freescale Synchronous Serial Interface
> >>> - q) USB EHCI controllers
> >>> + q) USB EHCI controllers
> >>> + r) Memory-mapped RAM & ROM
> >>
> >> Memory-mapped RA/RO Memory again? Should better drop this. :-)
> >
> > You're quite picky, aren't you ? :-)
> >
> > I suppose "Memory-mapped RA & RO" won't be accepted, so what about "Auxiliary
> > RAM & ROM" ?
>
> Direct-mapped?
Fine with me. Sergei ?
--
Laurent Pinchart
CSE Semaphore Belgium
Chaussée de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
F +32 (2) 387 42 75
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