Does mtd support two-plane page program for nand flash?

Adrian Hunter ext-adrian.hunter at
Fri Mar 9 03:09:37 EST 2007

ext Jörn Engel wrote:
> On Wed, 7 March 2007 14:57:02 +0800, falls huang wrote:
>>     AFAIK , the samsung's nand flash K9LAG08U0M/K9HBG08U1M/K9MCG08U5M
>> support two-plane page program. For example: The K9LAG08U0M is
>> arranged in four 4Gb memory planes.Each plane contains 2,048 blocks
>> and 2112 byte page registers. This allows it to perform simultaneous
>> page program and block erase by selecting one page or block from each
>> plane. ( refer to the datasheet of K9LAG08U0M)
> Interesting.  I was wondering when devices like this would show up.
> Do you have a spec for those chips?

OneNAND DDP does this too (google: onenand "2x program")

I presume the possibility exists to have the driver pretend that the
page size is twice as large and there are half as many erase blocks.
It would have to map the addressses accordingly - and everything
else would have to be willing to accept a 4KiB page with 8
subpages and 128 bytes of oob.

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