OneNAND: read-while-load (known problem)

[Adrian Hunter]

On 1/8/07, Kyungmin Park <kyungmin.park at samsung.com> wrote:
> Hi,
>
> FYI: read-while-load known problem in DDP.
>
> Of course it's rare case in MTD. and please don't program like this in upper layer.
>
> If you are using OneNAND DDP (Dual Densidy Package) and you want to read data between chip boundary. you maybe failed to read.
>
> For example, 2Gbit OneNAND DDP has following address
>
> Chip 0: 0x0000 0000 ~ 0x0800 0000 - 1
> Chip 1: 0x0800 0000 ~ 0x1000 0000 - 1
>
> If you want to read from 0x07ff f800 to 0x8000 0800 (4KB). it will be failed since each chip has its own bufferram
> So it don't support read-while-loading between each chip.
>
> [Chip 0] onenand_update_bufferram: 1 addr 0x7ffe000, valid = 1
> [Chip 0] onenand_update_bufferram: 0 addr 0x7ffe800, valid = 1
> [Chip 0] onenand_update_bufferram: 1 addr 0x7fff000, valid = 1
> [Chip 0] onenand_update_bufferram: 0 addr 0x7fff800, valid = 1
>   -> Send next page read, but next page is in chip 1
> [Chip 1] onenand_update_bufferram: 1 addr 0x8000000, valid = 1 => Actually it's invalid
> [Chip 1] onenand_update_bufferram: 0 addr 0x8000800, valid = 1
> [Chip 1] onenand_update_bufferram: 1 addr 0x8001000, valid = 1
>
> Thank you,
> Kyungmin Park

I think I see what you mean.  It occurs to me that maybe
onenand_check_bufferram has the same problem i.e. a different chip is
selected to the one that we want to read from.  Do you think there
could be a problem with onenand_check_bufferram also?