Issue with h/w ecc based NAND driver.

[Thomas Gleixner]

On Wed, 2006-08-23 at 11:12 -0700, Han Chang wrote:
> Hi there,
> 
> I'm using a NAND with h/w ecc. When a block is erased, both main data and 
> oob are set to 0xff, and if the driver read the main data in the page with 
> hardware enabled ecc, the 0xff in the oob is not the right ecc code, so the 
> ecc mechanism in the h/w try to recover the error and trash the content in 
> the main data area.
> 
> I tried to set the right ecc code in the oob for every page whenever a block 
> is erased. But then the problem is with page programming. When write a page, 
> the h/w ecc controller generates the ecc code and write it to the oob, since 
> the oob is already written once during erase, the 2nd write to the oob is 
> not taken well. So when read back the same page, it causes ecc error again.
> 
> I would appreciate very much if someone can shed some light on this kind of 
> delimma.

That's a know problem with braindead hardware. One solution is to apply
cluesticks (i.e. baseball bats) on the hardware designer. This only
helps for your well-being and does not solve the problem itself.

Look into drivers/mtd/nand/diskonchip.c doc200x_correct_data(). There is
an approach to tackle exactly the same problem.

	tglx