Protection registers and "top parameter" memory

[Pavel Kiryukhin]

Hi all,
I can not write protection registers (OTP) on Intel StrataFlash Wireless 
L18 memory: otp_write reports "all ok", but I get 0xff back.
After some investigation I think I found a reason:
to initiate writing we need issue the Program Protection Register 
command at the parameter's partition base address + some offset.
My flash is so caled "Top Parameter" memory that has parameter partition 
at the top of memory map.
It seems that current driver assumes that Parameter partition starts at 
bottom of memory map.
So I simply changed the direction of "chip walk" in 
cfi_intelext_otp_walk [cfi_cmdset_0001.c] to top->bottom in case of 
Intel StrataFlash (based on cfi->id and cfi->mfr).
The first tested chip now should always correspond to parameter partition.
As I'm new to flash programming please tell me if this is a known issue 
and if not - is my approach correct?
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I'm not in list so please answer (or cc) to savl at dev.rtsoft.ru
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Thank you,
Pavel Kiryukhin,
RTSoft, Moscow, Russia.