Handling multiple NAND chips

[Thomas Gleixner]

On Saturday 26 July 2003 12:22, J.D. Bakker wrote:
> At 11:56 -0400 25-07-2003, David Woodhouse wrote:
> >On Fri, 2003-07-25 at 11:51, J.D. Bakker wrote:
> >>  I have a two-hour old CVS; where should I look ?
> >  > Does it *help* to have separate data/CLE/ALE ?
> >
> >Probably not. What may help, and to be honest I won't be 100% sure till
> >we actually come to implement it, is having separate FR/B# so you can
> >happily poll for completion and leave multiple chips _busy_
> >independently.
>
> Polling should be possible through the Status Read command
> (0x70/0x71) anyway, right ? 

Yep, that works always and you don't have to have seperate FR/B# lines.

> Or would you want hardware to generate an
> interrupt when any of the FR/B# lines change ? Hmmm...

You can do this, but the question is, if it is really an advantage.

-- 
Thomas
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